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Overview
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This seminar is designed for people who need to write or test WDM device drivers for Windows --
but have little (or no) previous kernel-mode programming experience. This seminar teaches the
fundamentals about operating systems, devices, and general kernel mode programming that user-mode
developers typically don't have to deal with.
The seminar starts with a basic overview of the Windows operating system architecture, including
the structure of the operating system and executive. Also discussed are different processor modes,
or "rings" in x86 parlance -- and the differences between kernel-mode and user-mode execution.
The seminar then delves into memory management concepts, including: How virtual addresses
are translated to physical addresses, a definition of "demand paged virtual memory", and
the structures and strategies that Windows uses for memory management.
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Next the seminar discusses hardware access to devices, including Port I/O Space and memory space,
how devices are controlled via their device registers, Direct Memory Access (DMA) and Programmed I/O,
and interrupts. Interrupt Request Levels (IRQLs) and DPCs are discussed, as are issues
of re-entrancy and serialization. A discussion of thread scheduling is also included.
Next, the flow of an I/O request from user-mode to the O/S, to the driver stack and hardware,
and back to user mode is discussed.
The seminar finishes with an overview of the structure of Windows drivers, including how the PnP
Manager builds device "stacks."
Note that while this seminar focuses almost exclusively on Windows 32-bit platforms, some
details of 64-bit architectures are also covered.
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Target Audience
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Developers and testers who need to understand operating systems fundamentals,
and the basics of how drivers are implemented on Windows.
After successful completion of this seminar, students will be
well versed in Windows operating system, x86 device support, and device driver
fundamentals.
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The prepararation provided by this seminar will enable students who were
previously unfamilar with kernel-mode programming to attend and gain
maximum benefit from OSR's
Writing
Kernel Mode Device Drivers for Windows seminar.
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Prerequisites
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This seminar is an intense 3 days, specially designed for experienced developers who happen not to
know the details of operating systems or device driver implementation. This seminar is not appropriate
for non-technical attendees.
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The seminar requires working knowledge of Windows. Solid knowledge of the C programming
language, and how to read and write to a file using Win32 are also required to successfully complete
this seminar.
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Seminar Outline
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1. Windows System Architecture
A review Windows Operating System architecture concepts, including the organization
of the Executive. Processes and threads, dispatcher and control objects, security concepts, etc.
2. Privileged Modes of Operation
Different processor modes, "Ring0" through "Ring3" are discussed.
3. Virtual Memory
How and why Windows implements demand paged virtual memory for user applications
and the operating system. Page Tables, Page Directories, the PFN, and the VAD.
Memory manager policy, including working sets. 32-bit architectures versus 64-bit architectures.
4. Device Architectures
Device registers. Port I/O space versus memory space. How devices are controlled.
Programmed I/O. Direct Memory Access, both bus master and slave.
Scatter/gather and DMA-chaining. Interrupts. Shared interrupts. Nested interrupts.
General flow of a driver to service an I/O request.
5. Interrupt Request Levels and DPCs
Definitions of Interrupt Request Levels (IRQLs) and how IRQLs are used to organize system
operation. Interrupts and driver Interrupt Service Routines (ISRs).
Deferred Procedure Calls (DPCs). How the the dispatcher is requested for scheduling operations.
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6. Dispatching and Scheduling
A discussion of how the OS selects the next thread to run. Includes discussions of
scheduling on both single and multiple CPU systems.
7. The Hardware Abstraction Layer
Discussion of how the OS achieves its goal of hardware independence, focusing
on the role of the Hardware Abstraction Layer (HAL). Details of the HAL's abstraction
of processor resources are discussed, such as the HAL's model for port/register access.
8. MultiThreading, Re-entrancy and Serialization
What it means to be "thread safe", and fully re-entrant.
Serialization in kernel mode. Spin locks are defined, and the
different types of spin locks are described.
9. Driver Structure and The I/O Manager
This section describes the architecture and structure of the Windows I/O Subsystem.
Disk caching and the cache manager are discussed. There is also a detailed discussion
of how device stacks are built by the Plug and Play Manager, and how requests are
forwarded from device to device (and hence driver to driver) down the device stack.
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Cost
Introduction to Windows Driver Development
3 days, lecture
Cost:$1950 when paid 2 weeks in advance ($2150 otherwise)
OSR also teaches private on-site seminars
all over the world.
As with all of our seminar offerings, our Terms and Conditions and Bottom Line Guarantee apply.
Seminars Outside North America
Please contact OSR at +1.603.595.6500 for seminars held outside
of the United States and Canada. Prices vary by location.
All courses are taught in English. At some international locations,
translation services will be provided. Please contact OSR
for more information.
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